Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
COMMUNICATION CONTROL DEBUGGING SYSTEM
Document Type and Number:
Japanese Patent JPS56112154
Kind Code:
A
Abstract:

PURPOSE: To enable testing of status of hardware and software in an on-line state by providing respective communication route selectors between each communication control unit communication route of a duplex redundancy processing system and thus constituting a folding communication route.

CONSTITUTION: CPU10 and CCU20 of an in-use system are connected to an upper- rank station 2 by a selector 30 through a communication route L1, and CPU10 and CCU20 of a spare system are not connected to the upper-rank station 2 by a selector 30' and they are in a stand-by state. When testing, selectors 30, 30' are controlled by a processor for testing 50 and a route of CCU20, a selector 30, a channel L2 and CCU20' is formed. The data sent from CPU10 are transmitted to CPU10' through the CCU20, selector 30, channel L and CCU20'. By this, the state of receiving by CPU10' of the data sent out from CPU10 can be detected with a comparator 40. Consequently, the status of hardware and software can be tested in an on-line state.


Inventors:
SATOU KEIJI
MASUO KAZUYUKI
KAWASAKI ICHIO
AOKI TOSHIROU
MORI MAKOTO
Application Number:
JP1567280A
Publication Date:
September 04, 1981
Filing Date:
February 12, 1980
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
FUJITSU LTD
NIPPON TELEGRAPH & TELEPHONE
OKI ELECTRIC IND CO LTD
NIPPON ELECTRIC CO
HITACHI LTD
International Classes:
H04L1/00; H04L1/22; H04L69/40; (IPC1-7): H04L13/00



 
Previous Patent: JPS56112153

Next Patent: JPS56112155