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Title:
COMPILE METHOD, COMPILE DEVICE, AND PROGRAM FOR COMPILE
Document Type and Number:
Japanese Patent JP3870112
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To perform instruction movement for speculative execution while securing shortening of execution time to exception dependence for hardware- initiated potentially exception instructions (H-PEI) and software-initiated potentially exception instructions (S-PEI) inserted before the H-PEI, in a device which compiles a program described in a type safe language such as Java.
SOLUTION: A dependence graph discriminating an exception dependent arc from other dependence arcs such as a control dependence arc or a data dependence arc is created. As to the fastest execution start time of H-PEI, it is examined which case is faster, execution through the exception dependence arc or execution not through the exception dependence arc. If the latter case is faster, the instruction movement for the speculative execution for the instruction sequence including the H-PEI is performed.


Inventors:
Kazuaki Ishizaki
Mr. Tatsu Inagaki
Hideaki Komatsu
Application Number:
JP2002069221A
Publication Date:
January 17, 2007
Filing Date:
March 13, 2002
Export Citation:
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Assignee:
INTERNATIONAL BUSINESS MASCHINES CORPORATION
International Classes:
G06F9/45; (IPC1-7): G06F9/45
Domestic Patent References:
JP3707727B2
JP200066898A
Other References:
Carole Dulong,「具体例によるIA-64アーキテクチャの紹介」,情報処理,日本,社団法人情報処理学会,1998年12月15日,Vol.39, No.12,pp.1225-1232,ISSN:0447-8053
中西知嘉子・他,「パス選択によるソフトウェアパイプライニング」,電子情報通信学会論文誌,日本,社団法人電子情報通信学会,1997年 9月25日,Vol.J80-D-I, No.9,pp.774-786,ISSN:0915-1915
Attorney, Agent or Firm:
Hiroshi Sakaguchi
Yoshihiro City



 
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