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Patent Searching and Data


Title:
COMPLEX INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS5698857
Kind Code:
A
Abstract:

PURPOSE: To obtain both the bipolar transistor and the FET in a single epitaxial growth, by making use of the autodoping and outward diffusion of the impurity reverse conduction that takes place when the epitaxial layer of a single conduction type is grown.

CONSTITUTION: In the P type Si substrate, separating by the P type region 2, the N type region 21b of the N channel FET and the N type region 21a for the bipolar transistor are respectively diffusion-formed. The P type gate region 5 is formed in the region 21b. The N type layer 6 is epitaxially grown on the whole surface, and by means of the autodoping and the outward diffusion at this time the regions 2 and 5 come up in the layer 6 respectively. In the P type region 7 bordering on the region 2, the layer 6 is isolated and the p type region 8 is diffusion-formed on both ends of the layer 5. In the island region 22, the P type gate region 9 and the N+ type drain and source regions 10 and 11 are diffusion-formed. In another island region 23, the P type base region 14, the N type emitter region 15 and the N+ type collector region 16 are respectively formed.


Inventors:
MITARAI GOROU
Application Number:
JP181080A
Publication Date:
August 08, 1981
Filing Date:
January 10, 1980
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L29/80; H01L21/331; H01L21/337; H01L21/8249; H01L27/06; H01L29/73; H01L29/808; (IPC1-7): H01L27/06; H01L29/72; H01L29/80