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Title:
CONFIGURATION OF PROGRAMMABLE DEVICE USING HIGH-LEVEL LANGUAGE
Document Type and Number:
Japanese Patent JP2013164847
Kind Code:
A
Abstract:

To provide a method of configuring a programmable integrated circuit device using a high-level language.

The method includes: compiling a plurality of virtual programmable devices from description in a high-level language; receiving description of a user configuration for a programmable integrated circuit device in the high-level language; parsing the user configuration using a programming processor; selecting, as a result of the parsing, one of the compiled virtual programmable devices; instantiating the one of the compiled virtual programmable devices on the programmable integrated circuit device; and configuring the instantiated one of the compiled virtual programmable devices with the user configuration.


Inventors:
DORIS TZU-LANG CHEN
DESHANAND SINGH
Application Number:
JP2013022168A
Publication Date:
August 22, 2013
Filing Date:
February 07, 2013
Export Citation:
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Assignee:
ALTERA CORP
International Classes:
G06F17/50; G06F9/45
Domestic Patent References:
JP2006171913A2006-06-29
Other References:
JAMES COOLE ET AL.: "Intermediate Fabrics: Virtual Architectures for Circuit Portability and Fast Placement and Routing", CODES/ISSS'10 PROCEEDINGS OF THE EIGHTH IEEE/ACM/IFIP INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE, JPN7017000453, 24 October 2010 (2010-10-24), pages 13 - 22
GREG STITT ET AL.: "Intermediate Fabrics: Virtual Architectures for Near-Instant FPGA Compilation", IEEE EMBEDDED SYSTEMS LETTERS, vol. 3, no. 3, JPN6017004450, 12 September 2011 (2011-09-12), pages 81 - 84, XP055063469, DOI: doi:10.1109/LES.2011.2167713
MUHSEN OWAIDA ET AL.: "Synthesis of Platform Architectures from OpenCL Programs", 2011 IEEE 19TH INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES [ONLINE], JPN6017004452, 19 May 2011 (2011-05-19), pages 186 - 193, XP031869962, DOI: doi:10.1109/FCCM.2011.19
Attorney, Agent or Firm:
Hidesaku Yamamoto
Natsuki Morishita