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Title:
CONSTANT VOLTAGE CIRCUIT
Document Type and Number:
Japanese Patent JP2005327256
Kind Code:
A
Abstract:

To provide a constant voltage circuit capable of saving power consumption and preventing the occurrence of unstable action such as oscillation.

Since an absolute value of a source-to-gate voltage of an output voltage control transistor M1 is low when a current flowing through a load 10 is low, a gate voltage of a PMOS transistor M11 is increased and an on resistance of a PMOS transistor M11 is increased, and consequently, a phase compensation resistance value is increased. Since an absolute value of a source-to-gate voltage of the output voltage control transistor M1 is high when the current flowing through the load 10 is high, a gate voltage of the PMOS transistor M11 is reduced and an on resistance of the PMOS transistor M11 is lowered, and consequently the phase compensation resistance value is reduced.


Inventors:
NAGATA TOSHIHISA
YOSHII KOJI
MIZUGUCHI YUSUKE
Application Number:
JP2005099184A
Publication Date:
November 24, 2005
Filing Date:
March 30, 2005
Export Citation:
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Assignee:
RICOH KK
ANALOG RES KK
International Classes:
G05F1/56; (IPC1-7): G05F1/56
Domestic Patent References:
JP2001282372A2001-10-12
JP2002297248A2002-10-11
JPS61613A1986-01-06
JP2004062374A2004-02-26
JPH10283043A1998-10-23
JP2001075663A2001-03-23
JPH04369108A1992-12-21
JP2001148467A2001-05-29
Attorney, Agent or Firm:
Osamu Kawamiya
Masahiro Ishino



 
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