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Title:
連続的時間プログラム可能アナログブロックアーキテクチュア
Document Type and Number:
Japanese Patent JP3737515
Kind Code:
B2
Abstract:
A programmable analog circuit apparatus receives a differential analog input signal and provides a processed differential analog output signal. The programmable analog circuit apparatus includes a first input transconductor, a differential amplifiers, and a feedback transconductor. The first input transconductor has a programmable transconductance and includes an input transconductor positive input terminal and an input transconductor negative input terminal and an input transconductor positive output terminal and an input transconductor negative output terminal. The positive and negative input terminals are coupled to receive the differential analog input signal. The differential amplifier includes first and second amplifier input terminals and first and second amplifier output terminals. The positive and negative input transconductor output terminals are coupled to the first and second differential amplifier input terminals. The amplifier output terminals are coupled to the first and second amplifier input terminals. The amplifier provides the processed differential analog output signal via the amplifier output terminals. The feedback transconductor includes a positive feedback transconductor input terminal and a negative feedback transconductor input terminal and a positive feedback transconductor output terminal and a negative feedback transconductor output terminal. The positive and negative feedback transconductor input terminals are coupled to the first and second amplifier output terminals and the positive and negative feedback transconductor output terminals are coupled to the first and second amplifier input terminals. The feedback transconductor output terminals has a high output impedance.

Inventors:
Gorecky, James, Elle.
Application Number:
JP52633996A
Publication Date:
January 18, 2006
Filing Date:
March 01, 1996
Export Citation:
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Assignee:
LATTICE SEMICONDUCTOR CORPORATION
International Classes:
G06G7/06; G05F3/26; H03F1/08; H03F3/34; H03F3/45; H03H11/04
Domestic Patent References:
JP5055836A
Other References:
Michiel Steyaert, et al, ”A 10.7MHz CMOS OTA-R-C Bandpass Filter with 68dB Dynamic Range and On-Chip Automatic Tuning”, IEEE International Solid-State Circuits Conference, 米国,1992年 2月 1日,vol.35,p.66-67
Attorney, Agent or Firm:
Masaaki Kobashi