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Title:
CONTROL SYSTEM FOR BREAK POINT
Document Type and Number:
Japanese Patent JPS62173541
Kind Code:
A
Abstract:

PURPOSE: To attain the control of a break point at a time point when a microcode is read out and the value of a break point control field is equal to '1', by providing this control field to the microcode.

CONSTITUTION: The value '1' is previously set to the control field 40 of a microcode to which the break point control is desired among those microprograms stored in a file memory. Then a start address is set to an address register 6 and the RUN state of a processor is set to a control register 1. Thus the microcodes are successively set to a pipeline register 5 from a storage 4 and then executed. When the microcode having the field 40 set at '1' is latched by the register 5, a clock stop signal is sent to a clock control part 2.


Inventors:
KONDOU KIKUMA
Application Number:
JP1496286A
Publication Date:
July 30, 1987
Filing Date:
January 27, 1986
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/28; (IPC1-7): G06F11/28
Attorney, Agent or Firm:
Sadaichi Igita



 
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