CONTROLLER FOR INVERTER

Japanese Patent JP3188603

B2

PURPOSE: To make it possible to control with the least response delay time by subtracting a detected output voltage value of an inverter from an output voltage command value delayed by unit time, calculating an error voltage value and adding a voltage compensation value multiplied by a coefficient corresponding to the loop characteristics for feedback control and the output command value for the error voltage value.
CONSTITUTION: An error voltage value calculated from subtractors 2a to 2c and output voltage detection values eu, ev and ew is amplified by transversal filters 3a to 3c and an output voltage compensation value is output. The error voltage value is amplified by multipliers 5a-1 to 5a-n and error voltages in the past held by unit delay devices 4a-1 to 4a-(n-1) are also amplified in accordance with the coefficients set in the multipliers 5a-1 to 5a-n. The results obtained by adding the outputs of a plurality of multipliers 5a-1 to 5a-n by adders 6a-1 to 6a-4 are the voltage values to be compensated for the output voltage command values by considering error parts for n-th degree portion in the past. Output voltage command corrected by adding the output voltage command eu*, ev* and ew* to the voltage compensation values by the adders 7a to 7c are then output to a PWM signal generating circuit 8.

Motozumi Yura
Tomohisa Kameyama

JP6409995A

July 16, 2001

March 23, 1995

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Okuma Corporation

G05F1/10; H02M7/48; H02P27/06; H03H15/00; H03H21/00; (IPC1-7): H02M7/48; G05F1/10; H02P7/63

JP246174A
JP652398U

Kenji Yoshida (2 outside)

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