Title:
D/A CONVERTER
Document Type and Number:
Japanese Patent JP3090811
Kind Code:
B2
Abstract:
PURPOSE: To provide a D/A converter suitable for circuit integration by converting a digital signal in multi-bit while suppressing increase in number of resistors and logic circuits so as to suppress the increase in a chip occupied area.
CONSTITUTION: First and second extension circuits 12,14 including plural extension resistors RL20-RL2L and RJ20=RJ2L are provided to both ends of a resistor string circuit 15. The connection/nonconnection of the extension resistors to/from the resistor string circuit 15 is controlled with a 3rd logic circuit 25 with a bit switching signal BCH. A 1st logic circuit 22 controls 1st and 2nd switch groups 16, 17 in response to a digital signal and a required voltage is extracted from the resistor string circuit 15 or the extension resistor, a 2nd logic circuit 23 controls a 3rd switch group 18 to select either of 1st and 2nd switch groups 16, 17.
Inventors:
Kiyohisa Kuwana
Application Number:
JP5557493A
Publication Date:
September 25, 2000
Filing Date:
March 16, 1993
Export Citation:
Assignee:
Toshiba Corporation
Toshiba Microelectronics Corporation
Toshiba Microelectronics Corporation
International Classes:
H03M1/68; H03M1/76; (IPC1-7): H03M1/76; H03M1/68
Domestic Patent References:
| JP5871722A | ||||
| JP1147912A | ||||
| JP62181529U |
Attorney, Agent or Firm:
Takehiko Suzue