Title:
COPROCESSOR SUPPORTING STRUCTURE SUITED TO PROCESSOR NOT SUPPORTING COPROCESSING ORIGINALLY
Document Type and Number:
Japanese Patent JP3301781
Kind Code:
B2
Abstract:
PURPOSE: To provide a method operating a coprocessor related to a main processor which does not support coprocessing originally.
CONSTITUTION: A direct memory access(DMA) processor 11 is used for preparing DMA transfer between a local memory and an EISA bus. An address decoder 21 decodes the address value of the address line of an address bus 13 and generates a control signal 29 a state machine 22 uses. The state machine 22 generate a control signal 26 from this signal 29. This signal 26 selects a register from a DMA register 23 and receives data from a data bus 12. Viewed-through data is from the unused field of data transferred from an instruction from the local memory to the processor. A value in the data bus 12 is loaded to the DMA register 23 in response to the specific combination of the control signal 26. After loading, a DMA controller 24 supervises DMA transfer between the memory and the bus.
Inventors:
Joe H. Stainmets
Eric Gregory Taushek
Eric Gregory Taushek
Application Number:
JP15837792A
Publication Date:
July 15, 2002
Filing Date:
June 18, 1992
Export Citation:
Assignee:
HEWLETT-PACKARD COMPANY
International Classes:
G06F9/318; G06F9/38; G06F13/28; G06F15/16; G06F15/177; (IPC1-7): G06F13/28; G06F15/177
Domestic Patent References:
| JP60160443A |
Attorney, Agent or Firm:
Kaoru Furuya (2 outside)
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