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Title:
CORRELATION DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH04133171
Kind Code:
A
Abstract:

PURPOSE: To obtain a coefficient of correlation between two signals, on which the same noise is superposed, without removing the noise by using first and second integrating means to obtain an integral value of the level difference between two signals.

CONSTITUTION: Signals (a) and (b) to be measured the coefficient between which should be obtained are inputted from signal input terminals 11a and 11b to a first integration circuit 12, and an integral value I1 of the absolute value of the level difference in a prescribed section is outputted. A signal on which the same noise as signals (a) and (b) is superposed and which has no correlations to these signals is inputted to a second integration circuit 13 from signal input terminals 11a and 11b together with the signal (a) (or (b)), and an integral value I2 of the absolute value of the level difference in the prescribed section is outputted. An integral ratio detecting circuit 14 takes in integral values I1 and I2 and calculates I1/I2 to send a normalized integral value I to a correlation coefficient detecting circuit 1. This circuit 15 refers to a correction curve storage circuit 16 to send a correlation coefficient p corresponding to the integral value I to an output terminal 17.


Inventors:
ICHITSUBO SHINICHI
Application Number:
JP25599390A
Publication Date:
May 07, 1992
Filing Date:
September 26, 1990
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H04B7/26; G06F17/15; G06F17/18; (IPC1-7): G06F15/36; H04B7/26
Attorney, Agent or Firm:
Furuya



 
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