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Title:
COUNTING CIRCUIT
Document Type and Number:
Japanese Patent JPS56116331
Kind Code:
A
Abstract:

PURPOSE: To enable the measurement of error rate with a simple device without coding, by counting the error detection pulse produced within the reference time and giving the output to the alarm circuit after the error rate pulse more than specified value is counted.

CONSTITUTION: When 1-level is set to the input 1-2 of the shift register 1 and the clock pulse from the standard time generating circuit 3 is inputted to the clock terminal 1-1, every time when the clock pulse comes, the logic 1 is filled from the left of the shift register, and when (m) pulses are received, 1 appears on the output line 7 of the rotary switch 4, shift registers I1, II2 are cleared to form the standard time (m). On the other hand, since the logic 1 is given to the input 2-2 of the shift register II2, the error detection pulse from the PCM device 6 is inputted to the clock terminal 2-1, 1's are sequentially transmitted. Output can be obtainted when the shift register II2 receives (n) or more error pulses while the reset pulse of the shift register I1 to the next reset pulse.


Inventors:
FUJIMOTO HISANOBU
Application Number:
JP1939580A
Publication Date:
September 12, 1981
Filing Date:
February 19, 1980
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G01D1/08; G07C11/00; H03K21/00; (IPC1-7): G01D1/08; G07C11/00



 
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