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Title:
RFID内のメモリーモジュールのための電流集積センス増幅器
Document Type and Number:
Japanese Patent JP2006504211
Kind Code:
A
Abstract:
A low read current, low power consumption sense amplifier well suited for low frequency RFID systems is disclosed. An MOS transistor receives the read current from a memory cell, typically an EEPROM, and a current mirror is formed by a parallel MOS transistor. The mirror current is integrated on a capacitor after the charge on the capacitor is cleared via a reset pulse. A time period is defined during which the voltage on the capacitor is compared to a second voltage. The second voltage is formed from a reference voltage or from dummy cells, in either case the reference voltage is at about the logic boundary between a one and zero stored in a memory cell. A comparator, with or without input hysteresis, receives the voltage on the capacitor and a second voltage and within the time period, the output state of the comparator indicates the binary contents of the memory cell.

Inventors:
Crane, Izan, A
Wrap, curl
Shachan, Itan
Application Number:
JP2004543767A
Publication Date:
February 02, 2006
Filing Date:
October 14, 2003
Export Citation:
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Assignee:
Fairchild Semiconductor Corporation
International Classes:
G11C16/06; G01R19/00; G06K17/00; G06K19/07; G11C7/02; G11C7/06; G11C16/26; H03K5/08; H03K5/153; H03K5/22; H04B1/59; H04B5/02; H01L
Attorney, Agent or Firm:
Satoshi Furuya
Takahiko Mizobe
Kiyoharu Nishiyama