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Title:
DATA BUS CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPS6097461
Kind Code:
A
Abstract:

PURPOSE: To speed up data transfer between circuits without using any microcomputer by adding a control output which indicates that data is outputted to or inputted from a data bus.

CONSTITUTION: When a circuit 6 with a function transfers data to a circuit 7, the circuit 6 sends out a control output signal REQ and then a chip select signal CS is inputted to both circuits 6 and 7. Simultaneously, an input/output control signal R/W is controlled with the signal REQ of the circuit 6 so that the data bus of the circuit 6 operates in an output direction and the data bus of the circuit 7 operates in an input direction. When a clock signal is inputted from a terminal 5 to IE in said state, the circuit 6 inputs the data to the circuit 7 through the data bus. The data transfer from the circuit 7 to the circuit 6 is performed similarly.


Inventors:
ISHIZUKA KOUHEI
MAEDA SHIGEMICHI
NAKAGAWA JIYUNICHI
TAKIGAMI HIROSHI
Application Number:
JP20482083A
Publication Date:
May 31, 1985
Filing Date:
November 02, 1983
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F13/38; (IPC1-7): G06F13/38
Attorney, Agent or Firm:
Akio Takahashi



 
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