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Patent Searching and Data


Title:
DATA PROCESSOR AND ARITHMETIC UNIT IN SEQUENCE CONTROLLER
Document Type and Number:
Japanese Patent JPH10260816
Kind Code:
A
Abstract:

To easily convert numeric data of two bytes into numeric data of eight bits by means of an ASCII code with a processing in terms of hardware, by judging whether highest four bits of inputted data are specified values or not, inputting stored data of four bits and generating data of eight bits.

A judgment/storage instruction part 501 sets flags to pertinent ASCII code flag registers 502 and 503 when it judges that the highest four bits are '3'. Numeric data registers 504 and 505 latch lowest four bits D0-D3 based on the instruction of the judgment/storage instruction part 501. An eight bits generation circuit 506 reads data of four bits latched by the registers 504 and 505 and generates numeric data of eight bits. In the case of numeric data, it can be converted into numeric data of eight bits. The arithmetic processing can easily be executed at the time of executing the arithmetic processing later.


Inventors:
KOIKE TAKANAO
Application Number:
JP6325697A
Publication Date:
September 29, 1998
Filing Date:
March 17, 1997
Export Citation:
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Assignee:
RICOH KK
International Classes:
G06F7/38; G06F5/00; G06F7/493; G06F7/50; (IPC1-7): G06F5/00; G06F7/38; G06F7/50
Attorney, Agent or Firm:
Hiroaki Sakai