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Title:
DATA PROCESSOR HAVING INSTRUCTION COMPRESSION STORAGE AND INSTRUCTION RESTORATION FUNCTION
Document Type and Number:
Japanese Patent JPH1185512
Kind Code:
A
Abstract:

To prevent the occupancy ratio of an execution instruction in a memory for instruction storage from falling by providing a memory which stores an instruction code string that represents a specific instruction code string in a compressed form and its compressed configuration indication information and extending it in terms of hardware at the time of execution.

Instruction storage memory 1 stores an instruction code string that is represented in a compressed form at least about a specific instruction code string and compressed configuration indication information that shows a compressed configuration about the instruction code string. An instruction code restoring circuit 2 restores an instruction code string read from the memory 1 to an incompressed state based on the compressed configuration indication information that is added to the instruction code string. Thereby, it is possible to eliminate NOP(No Operation) instructions that cause to increase a load module capacity in a VLIW processor from a load module and to compress the load module.


Inventors:
IWATA YASUSHI
YASUSATO AKIRA
Application Number:
JP23828797A
Publication Date:
March 30, 1999
Filing Date:
September 03, 1997
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F9/38; (IPC1-7): G06F9/38; G06F9/38
Domestic Patent References:
JPS5428087A1979-03-02
Attorney, Agent or Firm:
Teiichi



 
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