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Patent Searching and Data


Title:
DATA RATE AVERAGING DEVICE
Document Type and Number:
Japanese Patent JPH0750645
Kind Code:
A
Abstract:

PURPOSE: To miniaturize a device, to unnecessitate an adjustment and to reduce the unstable elements such as the secular change of a characteristic by constituting the device by all the logic circuits without using analog parts such as a low-pass filter and an oscillator, in a data rate averaging device absorbing the time fluctuation of input data.

CONSTITUTION: Input data is inputted in a FIFO memory 12, a packet terminal circuit 11 outputs data length information showing the length of data to be transmitted within time T, and a stuff period calculation circuit 13 inputs data length information and outputs stuff insertion period information. A stuff pulse generation circuit 14 outputs a stuff timing signal from the stuff insertion cycle information and a reading control circuit 15 controls the output of the FIFO memory 12 according to the stuff timing signal.


Inventors:
SATO KENSUKE
MATSUMOTO KOJIRO
Application Number:
JP19586293A
Publication Date:
February 21, 1995
Filing Date:
August 06, 1993
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H04J3/07; H04J3/22; H04L7/00; (IPC1-7): H04J3/07; H04J3/22; H04L7/00
Attorney, Agent or Firm:
Akira Kobiji (2 outside)