To provide a data transfer device which eliminates the need to distribute data arrays with different meanings included in data arrays of one digital I/O.

Inputted data is added to the level of a DMA pointer control signal 3 at the input time and held by a DMA pointer 1 with the level of a pointer modifier control signal 13 and the level of an offset selector control signal 18. The data is stored in a memory having the address obtained by adding the value of one of offset latches 16 to the addresses that pointers indicate. Therefore, the data can be transferred while expanded into a data series obtained by adding the head or tail of the addresses, only a fixed address, or different kinds of offset from a flow of one data I/O.