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Patent Searching and Data


Title:
DATA TRANSMISSION SYSTEM FOR SCRAMBLED CODE
Document Type and Number:
Japanese Patent JPH02171052
Kind Code:
A
Abstract:

PURPOSE: To surely start scrambling and to prevent the production of a bit error by monitoring a transmission data and inverting the content of a register section for scrambler and a descrambler when the consecution of same codes takes place.

CONSTITUTION: When a counter 21 counts up the consecution of M-set of codes 0s in a transmission data (c), the counter 21 outputs a counting signal to a shift register unit 23Cn to set the content of the unit 23Cn. The setting changes the content of the unit 23Cn from 0 to 1. On the other hand, an exclusive OR circuit 23A outputs the data (c) having codes 0 not subjected to a random processing successively. The data (c) shifts the content of the unit 23Cn up to a register unit 23Cr. An exclusive OR circuit 23B ORs exclusively the content of the code 0 of the unit 23Cn and the content of code 1 of the unit 23Cr and outputs the result of calculation of the code 1 to the circuit 23A.


Inventors:
KUSANO TOSHIHIKO
Application Number:
JP32742088A
Publication Date:
July 02, 1990
Filing Date:
December 23, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04L9/06; H04L9/12; H04L9/14; H04L9/18; (IPC1-7): H04L9/06; H04L9/14
Domestic Patent References:
JPS60126939A1985-07-06
JPS60102015A1985-06-06
Attorney, Agent or Firm:
Yoshiyuki Iwasa