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Title:
DC LEVEL CORRECTION DEVICE
Document Type and Number:
Japanese Patent JPH03292065
Kind Code:
A
Abstract:

PURPOSE: To eliminate a line flicker or a face flicker while a reproduction accuracy of a DC level is increased by generating a difference voltage in response to a high/low offset level when the DC level of an optional line is too high or too low.

CONSTITUTION: The device is provided with a voltage detection means detecting a DC level of a horizontal synchronizing signal in a MUSE signal, a difference voltage detection means detecting a voltage difference between the above voltage and a prescribed clamp level reference voltage, a latch means latching the voltage difference for one horizontal period and a correction means correcting the DC level for one horizontal period in a synthesized video signal based on the voltage difference. Thus, a difference voltage between a voltage changing in following to the fluctuation of the DC level of the horizontal synchronizing signal and the prescribed clamp level reference voltage is obtained, and the difference voltage is used to correct the DC level for one horizontal period. Thus, when the DC level of an optional line is too high or too low, a difference voltage in response to a high/low offset level is generated.


Inventors:
OTOBE YUKIO
TAKAHASHI HIDENAGA
YOSHIDA MASAHIRO
NINOMIYA YUICHI
IZUMI YOSHINORI
GOSHI SEIICHI
Application Number:
JP9439390A
Publication Date:
December 24, 1991
Filing Date:
April 10, 1990
Export Citation:
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Assignee:
FUJITSU LTD
JAPAN BROADCASTING CORP
International Classes:
H04N5/18; (IPC1-7): H04N5/18
Domestic Patent References:
JPH03108875A1991-05-09
Attorney, Agent or Firm:
Teiichi Ijiba (2 outside)