Title:
デバッグ回路、半導体装置及びデバッグ方法
Document Type and Number:
Japanese Patent JP6477134
Kind Code:
B2
More Like This:
Inventors:
Yutaka Tamiya
Application Number:
JP2015066456A
Publication Date:
March 06, 2019
Filing Date:
March 27, 2015
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F11/36; G06F11/273
Domestic Patent References:
| JP2006113906A | ||||
| JP5210534A | ||||
| JP10003404A |
Foreign References:
| WO2008020513A1 |
Attorney, Agent or Firm:
Takeshi Hattori