Title:
DEMODULATOR
Document Type and Number:
Japanese Patent JP3121720
Kind Code:
B2
Abstract:
PURPOSE: To receive an FM multiplex signal with an excellent characteristic at a small cost-increase in the case of reception by a stationary station or by a mobile station.
CONSTITUTION: An MSK signal is obtained from an FM radio wave received by an antenna 12 via a tuner 14, a filter 16 and a limiter amplifier 18. A synchronization detection circuit 20 and a delay detection circuit 22 are used to detect the MSK signal thereby obtaining demodulation data. Demodulation data are subject to error correction by 1st and 2nd error correction devices 22, 24 and subject to CRC check by 1st and 2nd CRC check devices 24, 44. Demodulated data are stored in 1st and 2nd packet buffers 28, 46. When the data of the synchronization detector are not in error, demodulation data of the synchronization detector are given to a CPU 40 via an AND gate 30 and when the data of the delay detection circuit are correct, demodulation data of the delay detection circuit are given to the CPU 40 via an AND gate 32. The CPU 40 processes the demodulation data and provide the processed data to an output device 48.
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Inventors:
Tatsuo Hiramatsu
Yoshikazu Tomita
Masayuki Takada
Toru Kuroda
Tadashi Isobe
Osamu Yamada
Yoshikazu Tomita
Masayuki Takada
Toru Kuroda
Tadashi Isobe
Osamu Yamada
Application Number:
JP9421494A
Publication Date:
January 09, 2001
Filing Date:
May 06, 1994
Export Citation:
Assignee:
Sanyo Electric Co., Ltd.
Japan Broadcasting Corporation
Japan Broadcasting Corporation
International Classes:
H04L27/14; H04H20/47; H04J9/00; H04L27/227; H04H1/00; (IPC1-7): H04L27/14; H04H5/00; H04J9/00; H04L27/227
Domestic Patent References:
| JP614066A | ||||
| JP514550A | ||||
| JP5122197A | ||||
| JP62135047A | ||||
| JP653940A | ||||
| JP6152568A | ||||
| JP6291782A | ||||
| JP5130061A |
Attorney, Agent or Firm:
Yoshito Yamada