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Patent Searching and Data


Title:
DEMODULATOR
Document Type and Number:
Japanese Patent JPH11331288
Kind Code:
A
Abstract:

To provide a demodulator which is capable of calculating an accurate reception signal level for all times even at reception of a large power or reception of a small power.

An RF section 2 of the demodulator consists of a 1st BPF 2a and a variable RF amplifier 2b. An IF section consists of a 1st frequency converter 3a, a 2nd BPF 3b, a 1st level detector 3f, a variable IF amplifier 3c, a 2nd frequency converter 3d, a 3rd BPF 3e, and a 2nd level detector 3h, a 1st RSSI output means 3g that amplifies a 1st AGC signal from the 1st level detector 3f and that outputs a 1st RSSI signal, and a 2nd RSSI output means 3i that amplifies a 2nd AGC signal from the 2nd level detector to output a 2nd RSSI signal. Then a reception level calculation means 2b of a DSP section 6 calculates a reception signal level by using both the RSSI signals from both the RSSI output means 3g, 3i.


Inventors:
YAMASHITA ATSUSHI
Application Number:
JP13815198A
Publication Date:
November 30, 1999
Filing Date:
May 20, 1998
Export Citation:
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Assignee:
FUJITSU GENERAL LTD
International Classes:
H04N5/455; H04L27/22; (IPC1-7): H04L27/22