Title:
【発明の名称】対数関数的な伝達関数を有する回路配置
Document Type and Number:
Japanese Patent JPH11506898
Kind Code:
A
Abstract:
A circuit arrangement having a logarithmic transfer function between an input signal and an output signal in a predefined level range of the input signal circuit which has a very low power consumption and low circuit complexity, includes a first pair of amplifier elements, namely transistors, forming a first differential amplifier and a second pair of amplifier elements, namely transistors, forming a second differential amplifier. The first pair of transistors have their emitters connected to each other and to a first current source, their collectors connected to working impedances subdivided by respective taps, and their bases receive the input signal between them. The second pair of transistors have their emitters connected to each other and to a second current source, their collectors connected to the collectors of the first pair of transistors, respectively, and their bases cross-connected to the taps of the working impedances. A rectifier stage has inputs connected to the collectors of the first and second pairs of transistors and an output at which the output signal is formed.
Inventors:
Dick, Burghard
Application Number:
JP53161697A
Publication Date:
June 15, 1999
Filing Date:
March 05, 1997
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
G06G7/24; H03F3/45; H03G7/00; H03G11/08; (IPC1-7): H03G11/08; H03F3/45
Attorney, Agent or Firm:
Tadahiko Ito (1 outside)