Title:
【発明の名称】位相独立性帯域制御を有するデータ伝送システム受信機
Document Type and Number:
Japanese Patent JPH06505381
Kind Code:
A
Abstract:
A data transmission system receiver is disclosed which receives a formatted data stream (302) and operates in one of at least a first bandwidth mode and a second bandwidth mode. The formatted data stream (302) comprises a plurality of data edges (108, 110) and is sampled by a first clock signal (320). A plurality of clock edges (102, 104) defining transitions from one logic state to another is used to define "early" and "late" data edge occurrences. These occurrences are accumulated in accumulators (310, 312) and used as inputs to a clock counter (318) which produces a phase-adjusted clock signal (320). Additionally, the data transmission receiver comprises a detector (330) for detecting when a limited data stream (306) is synchronized with the phase-adjusted clock signal (320) and, in accordance with a predetermined algorithm, is able to switch the phase-lock circuit from the first bandwidth mode to the second bandwidth mode.
Inventors:
Bayer, Donald Earle
Miller, Mattie Earl
Martinovich, Cruzman
Miller, Mattie Earl
Martinovich, Cruzman
Application Number:
JP50626692A
Publication Date:
June 16, 1994
Filing Date:
January 27, 1992
Export Citation:
Assignee:
MOTOROLA INCORPORATED
International Classes:
H03L7/107; H04L7/033; H04L7/08; H03D3/02; H04L7/10; (IPC1-7): H04L7/033; H03D3/02; H03L7/107; H04L7/08
Attorney, Agent or Firm:
Shinsuke Onuki