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Title:
DEVICE AND METHOD FOR MEASURING SIR
Document Type and Number:
Japanese Patent JP2003318779
Kind Code:
A
Abstract:

To measure an SIR, after the removal of interference without JD demodulation, with high accuracy and within a short time.

A delay profile is prepared using a mid-amble section, and the delay profile and an estimated pass position are used to measure an SIR. That is, in a signal power measuring section 142 a signal power is measured from the delay profile and a selected path position, and in an interference electric power measuring section 144 interference electric power is measured, on the basis of the delay profile and the selected path position. In a signal electric power correction section 146 and an interference electric power correction section 148 required correction is executed, respectively, and in an SIR computing section 150, the SIR is computed with the use of a predetermined computing equation.


Inventors:
SETO YOSHITAKA
NISHIO AKIHIKO
Application Number:
JP2002117081A
Publication Date:
November 07, 2003
Filing Date:
April 19, 2002
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H04B1/707; H04B1/711; H04B1/7113; H04B7/26; H04B17/00; H04B17/336; H04W24/00; H04W88/02; (IPC1-7): H04B1/707; H04B7/26; H04B17/00
Attorney, Agent or Firm:
Koichi Washida