Title:
デジタルデータをフルブリッジ出力段部駆動用のPWM信号に変換するときの精細度を増加させる装置及び方法
Document Type and Number:
Japanese Patent JP4187831
Kind Code:
B2
Abstract:
The definition of conversion of a digital value in a PWM signal using an N-bit up/down counter is improved by increasing the dimension of the input datum to N+2 bits, using the two lsb of the N+2 input datum for selecting one among three intermediate levels between two consecutive values of an N-bit dynamic, according to a predefined table of combinations. The converter may still use an N-bit comparator.
Inventors:
Myoch Giuseppe
Galvia tieggio
Galvia tieggio
Application Number:
JP20384998A
Publication Date:
November 26, 2008
Filing Date:
July 17, 1998
Export Citation:
Assignee:
STMicroelectronics S.r.l.
International Classes:
H02P6/08; H02M7/48; H02M7/5387; H02P7/06; H03M1/82
Domestic Patent References:
| JP9121591A | ||||
| JP6116626A |
Attorney, Agent or Firm:
Hirofumi Mimata
Yasunori Gonda
Hiroshi Takeuchi
Yasunori Gonda
Hiroshi Takeuchi