PURPOSE: To generate an error data intentionally, to facilitate the diagnosis of an error detection circuit, and to realize exactness, by writing data independently on a data memory and a redundancy bit memory.
CONSTITUTION: Generally, other than an address 101, virtual addresses 103 and 104 having the same address ranges as that of the address 101, and another address areas, are provided. When the address 103 is inputted to a memory selector 1, a data RAM cell 107 is outputted, and when the address 104 is inputted to the selector 1, a parity RAM cell 106 is outputted. In this way, a switching between a normal mode and a diagnostic mode can be performed by using those addresses in a diagnostic mode time, and a RAM can be accessed individually by providing plural virtual addresses.
FUNAKOSHI SHUJI
YAMAOKA HIROMASA
KURISU YOFUMI
WAKITA AKIHIRO
HITACHI ENG CO LTD
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