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Title:
DIE BONDING APPARATUS
Document Type and Number:
Japanese Patent JPH0472639
Kind Code:
A
Abstract:

PURPOSE: To mount a chip in a state that a gap is hardly generated by a method wherein a bit which is lowered to the surface of a heat sink from a prescribed height at the surface of the heat sink and which comes into contact with a bonding material under a prescribed load is arranged and installed between a coating means of the bonding material and a loading means of the chip.

CONSTITUTION: A heat sink 3 inserted in a tunnel furnace 1 is heated to a prescribed temperature while it is conveyed along the bottom wall of the furnace 1; after that, it is stopped at the lower-part position of a first opening part 6; in this part, a molten solder 5 in a prescribed amount is dripped onto its surface by using a dispenser 7; and its surface is coated. The heat sink 3 is then stopped in the lower-part position of a bit 10; and in this part, the bit 10 is lowered, strikes the dripped solder 5, spreads it to a prescribed shape and flattens it. After that, the heat sink 3 is stopped in the lower-part position of a third opening 12; and a chip 13 which is sucked and held by using a collet 14 is mounted on the heat sink 3. Since the solder 5 is flattened at this time, a gap is hardly generated between the bonding face of the chip 13 and the solder 5.


Inventors:
YAMAMOTO AKIHIRO
HIRANO MASATO
KABESHITA AKIRA
KITAYAMA YOSHIFUMI
Application Number:
JP18641490A
Publication Date:
March 06, 1992
Filing Date:
July 12, 1990
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L21/52; (IPC1-7): H01L21/52
Attorney, Agent or Firm:
Shigetaka Awano (1 person outside)



 
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