To obtain a signal output by removing a DC variation component included in the signal in the case of processing signals of low frequencies up to high frequencies.

A differential circuit is provided with a 1st sampling/holding circuit 3 for obtaining 1st holding voltage by sampling and holding an analog input signal waveform by a 1st sampling pulse string outputted from a digital PLL circuit 10, a 2nd sampling/holding circuit 7 for obtaining 2nd holding voltage by sampling and holding an analog input signal by a 2nd sampling pulse string having a fixed phase difference and the same frequency from/as the 1st sampling pulse string and a differential amplifier 5 for amplifying a differential voltage by sampling and holding the 1st and 2nd holding voltage levels at the timing of a 3rd sampling pulse string having a fixed phase difference and the same frequency from/as the 1st and 2nd sampling pulse strings.