To construct a differential output circuit of a differential input by eliminating channel variation also without using a feedback part.

A part between the gate terminals of MOS transistors N1 and N2 constituting a first differential pair circuit is defined as an input signal voltage terminal, and a part between the drain terminals of MOS transistors N3 and N4 constituting a 2nd differential pair circuit is defined as an output voltage terminal. Resistors R are respectively connected between the source terminal of the transistor N1 and the drain terminal of the transistor N3, and between the source terminal of the transistor N2 and the drain terminal of the transistor N4, a capacitor (C0/2) is also connected between the output voltage terminals, the backgate terminals and source terminals of the respective MOS transistors are respectively short-circuited, and the source terminals of the transistors N3 and N4 are respectively grounded through a resistor R and a direct current source (2×I0).