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Patent Searching and Data


Title:
DIGITAL AGC SYSTEM
Document Type and Number:
Japanese Patent JPS5961309
Kind Code:
A
Abstract:

PURPOSE: To realize a stable operation even at a high speed transmission by multiplying an analog input signal with a signal eliminating an unnecessary frequency component from an AGC signal formed by processing digitally the analog input signal.

CONSTITUTION: A level detector 2 samples an utput signal of a multiplier 1. An adder 3 takes the difference between the sampled output and a reference value Vr and the difference is applied to a multiplier 4, which multiplies a control signal α determining a time constant of the AGC circuit with the output from the adder 3. A delay circut 6 forms a filter and an output of the multiplier 4 is smoothed. As a result, the 1st AGC signal AS1 is obtained. A low-pass filter 11 extracts a DC component AS2 from the signal AS1. The obtained signal AS2 and the analog input signal are multiplied at a multiplier 12. The generation of distortion is prevented and the time constant is increased equivalently by eliminating the unnecessary component from the AGC signal.


Inventors:
KAKU TAKASHI
Application Number:
JP17153682A
Publication Date:
April 07, 1984
Filing Date:
September 30, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04B3/04; H03G3/20; (IPC1-7): H03G3/00
Attorney, Agent or Firm:
Akira Yamatani