Title:
DIGITAL CROSS FADER DEVICE
Document Type and Number:
Japanese Patent JPH01149277
Kind Code:
A
Abstract:
PURPOSE:To attain a smooth switching by providing first and second counter means which count a member to be outputted from a dividing means and controlling the second counter means to execute an adding or subtracting counting when the first counter means executes the subtracting or adding counting. CONSTITUTION:First and second counter means 7 and 8 count a clock, which is divided by a dividing means 5, and a counting value is successively increased or decreased. First and second multiplying means 9 and 10 execute multiplication between respective input signals and the counting value of the first and second counter means 7 and 8. At such a time, when the first counter means 7 is in the condition of the adding counting, the second counter means 8 goes to the condition of the subtracting counting. When the first counter means 7 is in the condition of the subtracting counting, the second counter means 8 goes to the condition of the adding counting. As a result, when one of the two input signals is gradually increased, the other one is gradually decreased. Namely, the two input signals are gradually switched. Thus, the smooth switching of the signal can be executed.
Inventors:
ITO MASAYUKI
Application Number:
JP30714587A
Publication Date:
June 12, 1989
Filing Date:
December 03, 1987
Export Citation:
Assignee:
OTANI DENKI KK
International Classes:
G11B20/10; G11B27/02; G11B27/038; (IPC1-7): G11B20/10; G11B27/02
Domestic Patent References:
| JPS56119196A | 1981-09-18 |
Attorney, Agent or Firm:
Masayoshi Misawa