Title:
DIGITAL DEFUZZIFIER CIRCUIT
Document Type and Number:
Japanese Patent JP3142072
Kind Code:
B2
Abstract:
PURPOSE: To obtain a digital quantity as a determined value by hardware which performs fuzzy inference.
CONSTITUTION: This circuit is equipped with a weighting adding circuit 2 which multiplies electric signals, showing fuzzy information distributed on plural lines, by values corresponding to the order of the lines and adds the products, a simple adding circuit 3 which adds the electric signals without weighting, a constant current source 5 which is connected to the common point of the simple adding circuit, and a D/A converter 4 which inputs the outputs of both the circuits; and the output of the weighting adding circuit is connected to the analog input terminal of the AD converter, the output of the simple adding circuit is connected to the REF terminal of the AD converter, and the digital value outputted from the AD converter is regarded as the determined value.
Inventors:
Tetsuro Ren
Application Number:
JP32366491A
Publication Date:
March 07, 2001
Filing Date:
November 12, 1991
Export Citation:
Assignee:
Mikuni Corporation
International Classes:
G06G7/12; G06F9/44; G06N7/02; (IPC1-7): G06G7/12; G06F9/44
Domestic Patent References:
| JP296293A | ||||
| JP1224802A | ||||
| JP63123177A | ||||
| JP4316174A | ||||
| JP4363777A |
Attorney, Agent or Firm:
Norio Ishii