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Patent Searching and Data


Title:
DIGITAL DEMODULATOR
Document Type and Number:
Japanese Patent JP2005303846
Kind Code:
A
Abstract:

To provide a digital demodulator which includes performance applicable to multi-value QAM and is advantageous in power consumption, circuit scale, price and the like even for a high-speed signal, a symbol rate of which is several dozens of 10MBaud or more.

There are provided a quadrature demodulator which includes two A/D converters and outputs an in-phase signal and a quadrature signal at the same timing; first and second waveform shaping filters (output phases of which are different by T/4) for inputting the in-phase signal outputted from the quadrature demodulator; a delay circuit for delaying the quadrature signal outputted from the quadrature demodulator for one-sample time; third and fourth waveform shaping filters (output phases of which are different by T/4) for inputting an output of the delay circuit and the quadrature signal outputted from the quadrature demodulator; a timing error detection circuit for outputting a timing error signal from outputs of the waveform shaping filters; and a timing correction circuit for outputting timing-corrected in-phase and quadrature signals from the outputs of the waveform shaping filters.


Inventors:
SHIRATO YASUSHI
WATANABE KAZUJI
Application Number:
JP2004119525A
Publication Date:
October 27, 2005
Filing Date:
April 14, 2004
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H04L27/38; (IPC1-7): H04L27/38
Attorney, Agent or Firm:
Furuya Fumio