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Title:
DIGITAL DEMODULATOR
Document Type and Number:
Japanese Patent JPH09172464
Kind Code:
A
Abstract:

To obtain a digital demodulator preventing the increase of a circuit scale by providing a selection part and a threshold value generation part.

An extraction part 1 extracts received data equivalent for the past, a fixed time ago, and for the future, a fixed time later, specified by a basic threshold value set in advance from data obtained by A/D-converting a received and wave-detected analog signal. The extaction part 1 extracts data obtained by A/D-converting received data equivalent for the past or the future and data equivalent for the present in addition. A specifying part 2 specifies present received data A by comparing the A/D-converted data A equivalent for present received data extracted by the extraction part 1 and prescribed plural number of threshold value set by selected by a selection part 3 and generated by a generation part 4 by means of each transition pattern of extracted data one symbol ago and later.


Inventors:
YOSHIOKA SHIGEYUKI
INOUE TAKESHI
SHIMIZU MASAHIKO
MATSUYAMA KOJI
Application Number:
JP33055795A
Publication Date:
June 30, 1997
Filing Date:
December 19, 1995
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L27/14; (IPC1-7): H04L27/14
Attorney, Agent or Firm:
Teiichi



 
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