DIGITAL MULTI-LEVEL DEMODULATION SYSTEM AND DIGITAL MULTI-LEVEL DEMODULATOR

Title:

DIGITAL MULTI-LEVEL DEMODULATION SYSTEM AND DIGITAL MULTI-LEVEL DEMODULATOR

Document Type and Number:

Japanese Patent JPH07264255

Kind Code:

A

Abstract:

PURPOSE: To provide a digital multi-level demodulation method and multi-level demodulator in which a unique word undetection rate is reduced and frame synchronization is realized at a high speed with simple configuration.

CONSTITUTION: Four kinds of reference data (UI1-UI3, UQ1-UQ3), (UIB1-UIB3, UQ1-UQ3), (UI1-UI3, UQB1-UQB3), (UIB1-UIB3, UQB1-UQB3) being combinations of logic inversion data (UIB1-UIB3) of I-channel bit patterns (UI1-UI3) of a known unique word and logic inversion data (UQB1-UQB3) of Q-channel bit patterns (UQ1-UQ3) are stored in registers (21a-21d). Demodulated I, Q channel data (I1-I3, Q1-Q3) and the reference data for the registers are EXNORed and a signal (ST) representing detection of the unique word is generated when coincidence with any of reference data is found out.

Inventors:

KOJIMA HARUO

Application Number:

JP4897894A

Publication Date:

October 13, 1995

Filing Date:

March 18, 1994

Export Citation:

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Assignee:

SUMITOMO ELECTRIC INDUSTRIES

International Classes:

H04L27/38; H04B7/15; H04L27/22; (IPC1-7): H04L27/22; H04B7/15; H04L27/38

Attorney, Agent or Firm:

Yoshiki Hasegawa (3 outside)

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