To provide a digital phase comparator that has accuracy not deteriorated even when the comparator adopts a low clock frequency and an output clock of a clock oscillator is synchronous with a signal of a phase comparison object.
An analog phase comparator 1 detects a phase difference between a reference point of a 1st input signal (a) and reference point of a 2nd input signal (b) and provides an output of the result as a pulse wave. A 1st digital counter 2 outputs a count (f) as a result of counting up the phase difference (e) on the basis of a 1st clock (c) that is generated from a voltage controlled oscillator 5 to which an M sequence random number generator 6 applies jitter, and a 2nd digital counter 3 outputs a count (g) as a result of counting up the phase difference (e) on the basis of a 2nd clock (d) that is generated from the voltage controlled oscillator 5 to which the M sequence random number generator 6 applies jitter. A digital adder 4 sums the counts (f) and (g) and provides an output of the sum as a digital phase difference (h).
HARUI MASANORI
FUJIMORI YOSHIHISA
