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Patent Searching and Data


Title:
DIGITAL SIGNAL PROCESSING SYSTEM
Document Type and Number:
Japanese Patent JPS59197936
Kind Code:
A
Abstract:

PURPOSE: To add a simple change to a fixed-point circuit and use directly its multiplied results as the solution of integer calculation by registering an integer multiplier and integer multiplicant in respective registers by shifting their digital positions in case of multiplication between integers.

CONSTITUTION: In the case of multiplication between ordinary data, data of the multiplier and multiplicant are inputted into registers A and B through selectors E and F from a register for data memory, respectively, and the multiplication is performed at a multiplier C by a fixed-point system, and then, the solution is outputted to an accumulator D. Even in the case of multiplication between integers, data of the multiplier and multiplicant are added to the registers A and B through the selectors E and F and, at the same time, data from an address register H are added to the registers A and B through the selectors E and F in the same way. The multiplier and multiplicant are registered from the highest ranked one. The registers A and B are constituted so that the data can be registered under a condition where their digital positions are shifted. Moreover, by adding a registering instruction, multiplied results between integers are used as solutions of integer calculation.


Inventors:
KARIBE HIROHISA
Application Number:
JP7247983A
Publication Date:
November 09, 1984
Filing Date:
April 25, 1983
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F7/53; G06F7/493; G06F7/523; G06F7/544; G06F17/10; (IPC1-7): G06F7/52
Attorney, Agent or Firm:
Koshiro Matsuoka