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Patent Searching and Data


Title:
DIGITAL SIGNAL PROCESSOR AND METHOD
Document Type and Number:
Japanese Patent JPH11136058
Kind Code:
A
Abstract:

To provide a digital signal processor which reduces costs of a worker and also suppresses the variation of adjustment results at the time of adjusting an output level.

In this digital signal processor, when a video signal is outputted from a line I/O 2, an output signal from an output buffer 1 is inputted to a voltage control amplifier(VCA) 7 through an input buffer 3. The VCA 7 amplifies an input signal with a gain that corresponds to the voltage of a battery 12, and a sink level detection circuit in a digital signal processing circuit 6 outputs a detected sink level to a control circuit 9. The circuit 9 generates gain control voltage based on the inputted sink level and inputs it to a control terminal of a D/A converter 5. The converter 5 operates to vary gain according to the gain control voltage, and the circuit 9 operates to make the sink level that is outputted from the line I/O 2 constant.


Inventors:
OYAMA EIJI
Application Number:
JP31154897A
Publication Date:
May 21, 1999
Filing Date:
October 29, 1997
Export Citation:
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Assignee:
CANON KK
International Classes:
H04N5/14; H03G3/30; (IPC1-7): H03G3/30; H04N5/14
Attorney, Agent or Firm:
Toshihiko Watanabe



 
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