PURPOSE: To increase the DMA (direct memory access) transfer speed and to realize the parallel processes between a DMAC (direct memory access controller) and an MPU (microprocessor) by preparing the memory parts for DMAC and MPU separately from each other and dividing a data bus into two buses for DMAC and CPU.

CONSTITUTION: The DMA transfer of data is performed via a DMAC data bus 18 under the control of a buffer memory 15 using a DMAC 12 and an IO device 13. A CPU data bus 17 is prepared separately from a program memory 14 of an MPU 11. Both data buses 17 and 18 are connected to each other via a prescribed transceiver. In such a constitution, the DMA transfer is freely carried out as necessary. Furthermore a CPU and the MPU 11 can work even in the DMA transfer mode.