PURPOSE: To provide the circuit for performing rotated or enlarged/reduced display synchronously with dots, lines or frames without reloading the contents of a display memory concerning the display circuit for displaying bit map image data, which are plotted on an image memory, on a display device.

CONSTITUTION: An arithmetic and logic unit 1 calculates the address of a display memory 2 by inputting address counter outputs and timing signals and performing multiplication during a horizontal or vertical flyback, time and cumulative addition for each dot and line. Thus, a smoothly rotated moving image or the like can be displayed by performing the multiplication once a display frame or a display line and the cumulative addition for each dot or once a display line without performing highspeed arithmetic for each dot clock. Since even a multiplier at low speed is avilable and the time sharing operation of the multiplier is enabled, circuit scale is reduced and the circuit can be manufactured at low cost.