Title:
表示装置
Document Type and Number:
Japanese Patent JP6578403
Kind Code:
B2
Abstract:
A semiconductor display device using a light-emitting element, which can suppress luminance unevenness among pixels due to the potential drop of a wiring, is provided. Power supply lines to which a power supply potential is supplied are electrically connected to each other in a display region where a plurality of pixels are arranged. Further, an interlayer insulating film is formed over a wiring (an auxiliary power supply line) for electrically connecting the power supply lines to each other in the display region and a gate electrode of a transistor included in a pixel; and the power supply lines are formed over the interlayer insulating film which is formed over the auxiliary power supply line and the gate electrode. Furthermore, a wiring (an auxiliary wiring) formed over the interlayer insulating film is electrically or directly connected to the auxiliary power supply line.
Inventors:
Shunpei Yamazaki
Jun Koyama
Yoshifumi Tanada
Hiroyuki Miyake
Kei Takahashi
Jun Koyama
Yoshifumi Tanada
Hiroyuki Miyake
Kei Takahashi
Application Number:
JP2018070584A
Publication Date:
September 18, 2019
Filing Date:
April 02, 2018
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G09F9/30; H01L27/32; H01L29/786; H01L51/50; H05B33/02; H05B33/22
Domestic Patent References:
| JP2007299003A | ||||
| JP2005227788A | ||||
| JP2005049808A | ||||
| JP2007148215A | ||||
| JP2006012768A |
Foreign References:
| US20050218794 |