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Title:
DISTORTION COMPENSATING CIRCUIT
Document Type and Number:
Japanese Patent JP2005236715
Kind Code:
A
Abstract:

To provide a distortion compensating circuit capable of suppressing the output level of the distortion compensation circuit and protecting a power amplifier on a subsequent stage, when a momentary over input occurs.

This distortion compensating circuit detects a distorted component occurring in a power amplifier circuit, according to the output signal and the input signal of the power amplifier circuit for amplifying the input signal of a high-frequency band in power, generates a distortion compensation signal that corresponds to the detected distorted component, and compensates the distortion with the generated distortion compensated signal. The distortion compensating circuit is provided with a determination circuit 24 for determining the level of a signal subjected to distortion compensation and an attenuation circuit 25 for attenuating the level of the signal, subjected to distortion compensation with the output signal of the determination circuit, when the level of the signal subjected to distortion compensation is larger than a prescribed level.


Inventors:
TADA YASUTOSHI
HIROSE NOBUO
TSUKAMOTO NOBUO
Application Number:
JP2004044033A
Publication Date:
September 02, 2005
Filing Date:
February 20, 2004
Export Citation:
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Assignee:
HITACHI INT ELECTRIC INC
International Classes:
H03F1/32; H03F1/52; H03F3/24; H04B1/04; (IPC1-7): H03F1/52; H03F1/32; H03F3/24; H04B1/04
Attorney, Agent or Firm:
Katsuo Ogawa
Kyosuke Tanaka