PURPOSE: To simply generate refresh timing at the time of a backup mode by synchronizing a signal in accordance with a instructon of a backup mode with a row address strobe signal(RAS) and controlling refresh timing at the time of energizing.

CONSTITUTION: When a power supply is turned off, an interruption signal is applied to a CPU, and logic 0 is written in a FF1 through the CPU. And an output Q of a FF2 is made logic 1 in synchronism with a falling of a signal RAS5 outputted through capacitors and the like even after the power supply is turned off, a signal RAS7 and a column strobe signal CAS8 are respectively outputted from AND circuit 3, 7, and refresh timing at the time of backup is simply generated by utilizing refresh timing at the time of energizing.