Title:
DRIVE CIRCUIT
Document Type and Number:
Japanese Patent JP2002152023
Kind Code:
A
Abstract:
To obtain a drive circuit for a switching device that can prevent malfunction from being caused by a dv/dt transient signal and a sudden noise independently of a filtering function.
An RS latch 181 consists of NAND gates G11, G12. A high voltage side floating supply offset voltage VS is directly applied to a source of an NMOS transistor(TR) 40 whose gate receives an output of a set side inverter 31 in the NAND gate G11, and the high voltage side floating supply offset voltage VS is applied via an NMOS TR 35 to a source of an NMOS (TR) 35 whose gate receives an output of a reset side inverter 32 in the NAND gate G12. A threshold voltage of the NMOS TR 35 is set higher than that of the NMOS TR 40 by a back-gate effect.
Inventors:
WATABE KIYOTO
Application Number:
JP2000343314A
Publication Date:
May 24, 2002
Filing Date:
November 10, 2000
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03K3/356; H03K17/16; (IPC1-7): H03K17/16; H03K3/356
Attorney, Agent or Firm:
Shigeaki Yoshida (2 outside)