Title:
DROPOUT DETECTING CIRCUIT
Document Type and Number:
Japanese Patent JPS62146468
Kind Code:
A
Abstract:
PURPOSE:To detect an optimum dropout corresponding to the kind of a generated noise by obtaining a dropout detecting signal when the frequency of a frequency converting signal is changed because of the increase of disturbance of a reproduced RF signal waveform. CONSTITUTION:A boosting circuit 15 in a dropout detecting circuit 1 has amplifying characteristics increasing output levels on both sides larger than a carrier signal level in the frequency range of upper and lower side band signal components of a chroma signal around a carrier signal component and outputs a boosted output signal having such a characteristic to an output terminal. The boosted output signal is applied to a comparator 16 as a comparing signal SEO, and when the instantaneous value of the signal SEO is increased larger than a dropout detecting reference signal VDC obtained from a reference power supply 17, a compared output SCOM having logic '1' level is sent to a frequency detecting circuit 18 as a frequency converting signal. When the frequency of the output SCOM becomes lower than the prescribed frequency, the circuit 18 generates a detecting output SDET with logic '0' level and sends the output as a dropout detecting output DOOUT through a dropout detecting width expanding circuit 19.
Inventors:
YOSHIDA AKIYUKI
Application Number:
JP28724185A
Publication Date:
June 30, 1987
Filing Date:
December 20, 1985
Export Citation:
Assignee:
SONY CORP
International Classes:
G11B20/06; H04N5/94; H04N9/88; (IPC1-7): G11B20/06; H04N5/94; H04N9/88
Attorney, Agent or Firm:
Kei Tanabe