Title:
DUPLEX PROCESS INPUTTING AND OUTPUTTING DEVICE
Document Type and Number:
Japanese Patent JP3736062
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To improve the reliability of a process control system by duplexing a process interface part and a pulse counter in the pulse input module of a specific module pair, discriminating it as a major failure when plural pulse count values are made noncoincident, and switching activation/waiting.
SOLUTION: Input filters 101A and 101B operate the noise removal of a pulse input signal, and operate voltage level conversion and waveform shaping, and counters 103A and 103B count the almost in-phase pulse input signals. A processor 100 latches the outputs of counters 103A and 103B in registers 104A and 104B by a latch signal 105 obtained by using parallel output ports and reads the outputs of the registers 104A and 104B by register reading signals 106A and 106B, and checks whether or not both are made coincident. Then, when they are noncoincident, it is discriminated as being a failure of its own module, activation authority is abandoned, and a processing is succeeded to the other side of a duplex module pair.
Inventors:
Tetsuo Ishikawa
Hiroyasu Ikedo
Hiroyasu Ikedo
Application Number:
JP23080997A
Publication Date:
January 18, 2006
Filing Date:
August 27, 1997
Export Citation:
Assignee:
Fuji Electric Systems Co., Ltd.
International Classes:
G05B9/03; G06F13/00; G05B7/02; G05B15/02; G05B19/05; (IPC1-7): G05B9/03; G05B7/02; G05B15/02; G05B19/05; G06F13/00
Domestic Patent References:
| JP7234709A | ||||
| JP3201102A | ||||
| JP6348302A | ||||
| JP3253903A | ||||
| JP9167290A | ||||
| JP5003427A | ||||
| JP7152679A | ||||
| JP7244599A | ||||
| JP9093209A |
Attorney, Agent or Firm:
Yuichi Morita