PURPOSE: To prevent an entire system from being shut-off with a fault generated during a single operation by continuing a processing by receiving data from a system reading correct data when the correction disable error of a memory is generated, continuing a synchronous operation and minimizing the time of the single operation until the repair is completed.

CONSTITUTION: Contents in the memory device 8 of the other system are copied through an inter-system communication mechanism 5 and a bus buffer 6. A data comparator 3 compares the data read from the memory device 8 of the other system with the data read from a memory device 8 of its own system. When the correction disable error of contents in an array part 10 of its own system is generated, an error detection and correction/memory control circuit 9 reloads the contents in the array part 10 of its own system according to the data read from an array part 10 of the memory device 8 in the other system.