Title:
超伝導バンプ接合の電気的特性評価
Document Type and Number:
Japanese Patent JP7236546
Kind Code:
B2
Abstract:
Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.
Inventors:
Graninger, Aurelius El.
Strand, Joeldi.
Stautymore, Mika John Atman
Keane, The Curry Kyle
Hartmann, Jeffrey David
Hackley, Justin Sea.
Strand, Joeldi.
Stautymore, Mika John Atman
Keane, The Curry Kyle
Hartmann, Jeffrey David
Hackley, Justin Sea.
Application Number:
JP2021538719A
Publication Date:
March 09, 2023
Filing Date:
December 04, 2019
Export Citation:
Assignee:
Northrop Grumman Systems Corporation
International Classes:
H10N60/80; H01L21/60; H01L25/065; H01L25/07; H01L25/16; H01L25/18; H10N60/00; H10N60/12
Foreign References:
| US20090173936 |
Attorney, Agent or Firm:
Makoto Onda
Hironobu Onda
Atsushi Honda
Hironobu Onda
Atsushi Honda
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